Today and the Future

A two-day short course given
at Arizona State University



Dieter K. Schroder
Arizona State University
Tempe, AZ 85287-5706

Tel: (480) 965-6621




Next Course:

Not planned


Center for Professional Development
College of Engineering and Applied Sciences
Arizona State University
P.O. Box 877506
Tempe, AZ 85287-7506

Telephone: (480) 965-1740
Fax: (480) 965-8653

The course is also available as an industrial in-house course

This two-day intensive short course, a condensed version of an advanced MOSFET graduate course taught by D.K. Schroder at Arizona State University, covers most of the important physics and technology issues of today's advanced MOSFETs and discusses considerations for future devices and technologies. This objective of this course is to provide a good overview of today's and tomorrow's MOS devices. It covers topics often not discussed in device physics courses, such as quantum effects/poly-Si depletion, subthresh-old behavior, drain-induced barrier lowering (DIBL), gate-induced drain leakage (GIDL), short-channel effects, high-K and low-K dielectric issues, Cu interconnects, gate oxide leakage current, silicon-on-insulator and silicon-germanium issues as well as new device structures.

Who Should Attend
This two-day short course is intended for semiconductor engineers (device engineers, circuit engineers, process engineers and product engineers) with a basic understanding of semiconductor devices who want a deeper understanding of advanced MOSFET physics, concepts, and device issues. Some basic knowledge of semiconductor devices and device physics is desirable.

* Deals exclusively with MOS devices
* Addresses today's basic and advanced MOS device issues
* Addresses future device issues/problems
* Uses a conceptual rather than a mathematical approach to device understanding

What You Can Expect To Learn
* The basics of MOS devices - MOS capacitors and MOSFETs
* A broad overview and perspective of relevant device issues
* Advanced device considerations, e.g., high and low-K dielectrics, silicon-on-insulator technology
* Future device technlogy, e.g., strained silicon on SiGe



MOS Capacitors
Energy Band Diagrams
* Oxide Charges/Interface States
* Gate Depletion

Threshold Voltage
* Substrate Bias
* Gate Material

* Short/Narrow Channel Effects
* Charge Sharing
* Threshold Voltage Roll Off

MOSFET Current-Voltage
Basic Current - Voltage
* Pao-Sah Model
* Charge Sheet Model
* Subthreshold Conduction
* "On" Versus "Off" Currents

Power Dissipation - Sample
* Active - Passive Power Dissipation
* Supply/Threshold Voltage Limitations
* Low-K Dielectrics
* High-K Dielectrics

Nuisance Effects
* Drain Induced Barrier Lowering (DIBL)
* Gate Induced Drain Leakage (GIDL)
* Channel Length Modulation
* Breakdown
* Series Resistance

Latch Up
* Mechanism
* Triggering Mechanisms
* Avoidance

Gate Dielectric Issues
* Gate Oxide Currents
* Fowler-Nordheim Tunneling
* Direct Tunneling
* Electric/Thermal Breakdown
* Stress Induced Leakage Current (SILC)

Hot Carriers
* MOSFET Degradation
* Substrate/Gate Current
* MOSFET Lifetime
* LDD and Hot Carrier Suppression
* Negative Bias Temperature Instability (NBTI)

* Propagation Delay
* Copper versus Aluminum
* Line Electromigration
* Via Electromigration
* Median Time To Failure

Mobility, Velocity
* Effective Mobility
* Velocity Saturation

* Moore's Law
* Scaling Rationale
* Scaling Constraints
* Scaling Rules
* Interconnect Scaling
* Novel Device Structures

Electrostatic Discharge
* Mechanism
* Discharge Models
* Protection Devices

* SOI versus Bulk
* Bonded
* Eltran
* Partial/Full Depletion
* Floating Body Effects

* Band Gap Offsets
* Strained Layers
* Mobility Enhancement

* Nonvolatile Memories
* MNOS Memories
* Ferroelectric Memories
* Electrolyte Memories
* Volatile Memories
* Sense Amplifiers

* Power MOSFET Concepts
* Lateral Diffused MOSFETs
* Vertical MOSFETs
* Insulated Gate Bipolar Transistors
* Safe Operating Area

Dieter Schroder, Professor of Electrical Engineering at Arizona State University, has worked with semiconductor material and device electrical characterization for the last 30 years at the Westinghouse R&D Labs. and at Arizona State University. His current research interests are Si materials and devices, which are major thrusts of ASU's Center for Solid State Electronics Research and Center for Low Power Electronics. He has used electrical measurements in the analysis of power and MOS devices, as well as visible and infrared imaging devices. He is author of the books Advanced MOS Devices and Semiconductor Material and Device Characterization, 3rd Ed., Wiley-Interscience in 2006and has published many papers on device physics and on semiconductor characterization. He is an IEEE Life Fellow.